1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and method of fabricating a liquid crystal display device, and more particularly, to an array substrate of a liquid crystal display device and a method of fabricating an array substrate of a liquid crystal display device.
2. Discussion of the Related Art
In general, liquid crystal display (LCD) devices are driven by making use of optical anisotropy and polarization characteristics of a liquid crystal material. The LCD devices commonly include two substrates that are spaced apart and face each other, and a liquid crystal material layer interposed between the two substrates. Each of the substrates includes electrodes that face each other, wherein a voltage supplied to each electrode induces an electric field perpendicular to the substrates between the electrodes. An alignment of liquid crystal molecules of the liquid crystal material layer is changed by varying an intensity or direction of the applied electric field. Accordingly, the LCD device displays an image by varying light transmittance through the liquid crystal material layer in accordance with the arrangement of the liquid crystal molecules. Thus, the LCD device has superior light transmittance and aperture ratio.
LCD devices that include thin film transistors and matrix configuration of pixel electrodes, which are referred to as an active matrix LCD device, are commonly used because of their high resolution and ability to quickly display moving images. However, the LCD devices are disadvantageous due to their narrow viewing angle. To overcome the narrow viewing angle, an in-plane switching (IPS) LCD device has been developed that implements an electric field that is parallel to surfaces of the substrates.
FIG. 1 is a plan view of an array substrate for an in-plane switching (IPS) liquid crystal display (LCD) device according to the related art. In FIG. 1, a gate line 12 is formed along a first direction on a substrate 10, and a common line 16 is formed along the first direction parallel to the gate line 12. In addition, a data line 24 is formed along a second direction perpendicular to the first direction to cross the gate line 12 and the common line 16. Accordingly, the data line 24 and the gate line 12 define a pixel area P.
A thin film transistor T is formed at the crossing of the gate line 12 and the data line 24 to function as a switching element. The thin film transistor T is composed of a gate electrode 14 that is connected to the gate line 12, a source electrode 26 that is connected to the data line 24, a drain electrode 28 that is spaced apart from the source electrode 26, and a semiconductor layer 20 that is disposed between the gate electrode 12 and the source and drain electrodes 22 and 24. The source electrode 26 may have a U-shape, and may surround a part of the drain electrode 28, which may have a rod shape.
In the pixel area P, a pixel electrode 30 and a common electrode 17 are formed, wherein the pixel electrode 30 is connected to the drain electrode 24 and the common electrode 17 is connected to the common line 16. The pixel electrode 30 is composed of an extension part 30a, a plurality of vertical parts 30b, and a horizontal part 30c. The extension part 30a is connected to the drain electrode 28, and the plurality of vertical parts 30b, which are spaced apart from each other, vertically extend from the extension part 30a. The horizontal part 30c overlaps the common line 16 and is connected to the plurality of vertical parts 30b. 
The common electrode 17 includes a horizontal portion 17a and a plurality of vertical portions 17b, wherein the horizontal portion 17a overlaps the extension part 30a of the pixel electrode 30. The plurality of vertical portions 17b vertically extend from the common line 16 and are alternately arranged with the plurality of vertical parts 30b of the pixel electrode 30. The plurality of vertical portions 17b are connected to the horizontal portion 17a of the common electrode 17.
The common line 16 and the horizontal part 30c of the pixel electrode 30 form a storage capacitor C that is parallel to a liquid crystal capacitor. Accordingly, the common line 16 functions as a first storage electrode and the horizontal part 30c functions as a second storage electrode. However, as shown in FIG. 1, the data line 24 and the drain electrode 28 may become electrically shorted together.
FIG. 2 is an enlarged plan view of region “A” of FIG. 1 according to the related art. In FIG. 2, the source electrode 26 extends from the data line 24 and is disposed over and along a first side of the gate electrode 14. Similarly, the drain electrode 28 is disposed over the gate electrode 14 along a second side of the gate electrode 14. Accordingly, the source electrode 26 has a U-shape, and the drain electrode 28 that extends over the gate electrode 14 has a rod shape that is surrounded by the source electrode 26.
During a patterning process of the data line 24, the source electrode 26, and the drain electrode 28, a residuary layer 50 may remain along a stepped portion of the gate electrode 14 located between the data line 24 and the drain electrode 28. Accordingly, the data line 24 and the drain electrode 28 may become electrically shorted together when a voltage is supplied to the LCD device. Thus, driving the LCD device may be problematic due to the electrical short circuit of the data line 24 and the drain electrode 28.
To solve these problems, the semiconductor layer 20 has been formed to have an enlarged area formed over the gate electrode 14 in an area where the data line 24 and the drain electrode 28 may electrically short circuit. However, a position of the semiconductor layer 20 may be shifted during formation processes of the semiconductor layer 20 such that the data line 24 and the drain electrode 28 may still become electrically short circuited.